Scalable, energy-aware system modeling and application-specific reconfiguration of MPSoCs with a type-2 fuzzy logic system
Ref: CISTER-TR-200502 Publication Date: 1, Mar, 2019
Scalable, energy-aware system modeling and application-specific reconfiguration of MPSoCs with a type-2 fuzzy logic systemRef: CISTER-TR-200502 Publication Date: 1, Mar, 2019
This paper demonstrates that interval type-2 Fuzzy Logic Systems (FLS’s) are suited to Multiprocessor System-on-a-Chip (MPSoC) design modeling because of their ability to handle the uncertainty associated with input parameters. This makes for a scalable modeling process, whereas prior usage of type-1 FLS’s for modeling inhibited scalability. Specifically, the paper proposes a type-2 Takagi Sugeno Kang (TSK) FLS for modeling MPSoCs built around a multicore processor with shared memory. The paper also presents a TSK FLS reconfiguration methodology in order to dynamically reduce the energy consumption of such a multiprocessor. Modeling of MPSoC’s by means of the type-2 TSK FLS was found to be effective in terms of a reduction in the Energy Delay Product when applied to five large-scale numerical processing applications on an MPSoC. In fact, experimental results show a significant reduction (by 87–93% across the applications) in the energy consumption of an MPSoC.
Published in Computers & Electrical Engineering, Elsevier, Edited: Dr. Manu Malek, Volume 74, pp 292-304.