Jatin joined the CISTER research unit in September 2018 as a PhD student. He is currently an Integrated PhD Researcher at CISTER and Embedded Systems Research Scientist at VORTEX CoLab, where he is involved in cutting-edge research for the safety and security of cyber-physical systems.
He completed his PhD in Electrical and Computer Engineering from the Faculty of Engineering, University of Porto in 2023. His dissertation focused on the schedulability analysis of real-time tasks executing on COTS multicore systems by building novel solutions for accurately quantifying contention due to the sharing of main memory and memory buses in multicore platforms. His PhD research was partially funded by FCT (Portuguese Foundation for Science and Technology) under the individual PhD grant.
Before joining CISTER, he received M.Tech in Embedded Systems and B.Tech in Electronics & Communication Engineering from India in 2017 and 2014, respectively. He has co-authored several publications in reputed real-time systems conferences and journals. Among other awards and honors, he received the "Best Paper Award" at ICESS 2021 and "PhD Forum Prize" at DATE 2023.
His research interests encompass real-time embedded systems, timing and scheduling analysis, resource contention, and predictability in multicore architectures.