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Syed Aftab Rashid (Publications)

Syed Aftab Rashid (Publications)

Syed Aftab Rashid (Publications)

PhD University of Porto, Portugal
Integrated PhD Researcher

Syed Aftab Rashid joined the CISTER research unit in 2015 as a Ph.D. student. He is currently an integrated Ph.D. researcher and serves as CISTER lead at VORTEX-CoLab. He completed his Ph.D. from the University of Porto, Portugal, in 2021.

His dissertation was on the timing analysis of multicore platforms for hard real-time systems with a focus on contention due to sharing of cache memories and interconnects.

Before joining CISTER, he received his M.Sc. in Electrical Engineering from the National University of Computer and Emerging Sciences (NUCES)-FAST, Islamabad, Pakistan in 2014.

He has worked on several international projects related to embedded system design and implementation. He has also co-authored several publications in reputed conferences (e.g., RTSS, ECRTS, RTCSA, DATE) and journals (e.g., Applied Energy). Aftab has also been a part of different conference organization committees including ECRTS, RTNS, and CPSWeek.

His research interests include real-time embedded systems, timing and scheduling analysis, resource contention, and multicore architectures' predictability.

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Thesis
Towards Timing Analysis of Multi-core Platforms for Hard Real-Time Systems CISTER-TR-210403 
Syed Aftab RashidPhD Thesis. 9, Apr, 2021. Porto.Presidente do Juri Doutor José Alfredo Ribeiro da Silva Matos, Professor Catedrático da FEUP
Vogais Doutor Sebastian Altmeyer, Professor da University of Augsburg, Augsburg, Alemanha. Doutora Claire Maiza, Associate Professor do Grenoble INP Institute d’Ingénierie et de Management, Grenoble, França. Doutor Eduardo Manuel Medicis Tovar, Professor Coordenador do Departamento de Engenharia Informática do Instituto Superior de Engenharia do Instituto Politécnico do Porto (Orientador). Doutor João Paulo de Castro Canas Ferreira, Professor Associado do Departamento de Engenharia Eletrotécnica e de Computadores da Faculdade de Engenharia da Universidade do Porto. Doutor Mário Jorge Rodrigues de Sousa, Professor Auxiliar do Departamento de Engenharia Eletrotécnica e de Computadores da Faculdade de Engenharia da Universidade do Porto.

Conference or Workshop Papers/Talks
Open Questions for the Bus-Blocking Problem in the 3-Phase Task Model under Partitioned Scheduling CISTER-TR-210503 
Jatin Arora, Cláudio Maia, Syed Aftab RashidAccepted in CAPITAL Workshop - sCalable And PrecIse Timing AnaLysis for multicore platforms (CAPITAL 2021). 4, Jun, 2021, Junior Presentations. Australia.
Bus-Contention Aware Schedulability Analysis for the 3-Phase Task Model with Partitioned Scheduling CISTER-TR-210206 
Jatin Arora, Cláudio Maia, Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar29th International Conference on Real-Time Networks and Systems (RTNS 2021). 7 to 9, Apr, 2021, Technical Session. Online.
Open Issues in Analyzing the Schedulability for the 3-Phase Task Model using Partitioned Scheduling CISTER-TR-210603 
Jatin Arora, Cláudio Maia, Syed Aftab Rashid, Eduardo TovarAccepted in The symposium of “Electrical and Computer Engineering” of the 4th Doctoral Congress Engineering (DCE21) (DCE). 2021, Poster/Presentation Session. Portugal.
Work-In-Progress: WCRT Analysis for the 3-Phase Task Model in Partitioned Scheduling CISTER-TR-201005 
Jatin Arora, Cláudio Maia, Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar
ABSTRACTPDFPDF Additional Files: PDFPoster
Work in Progress Session, 41st IEEE Real-Time Systems Symposium (RTSS 2020). 1 to 4, Dec, 2020, pp 407-410. Online.
Bounding Cache Persistence Reload Overheads for Set-Associative Caches CISTER-TR-200716 
Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar26th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2020). 19 to 21, Aug, 2020, Real-Time Systems, pp 1-10. Online.Outstanding Paper Award
Cache Persistence-Aware Memory Bus Contention Analysis for Multicore Systems CISTER-TR-191102 
Syed Aftab Rashid, Geoffrey Nelissen, Eduardo TovarDesign, Automation and Test in Europe Conference (DATE 2020). 9 to 13, Mar, 2020, pp 442-447. Online.
Server Based Task Allocation to Reduce Inter-Task Memory Interference in Multicore Systems CISTER-TR-191002 
Syed Aftab Rashid17th International Conference on Frontiers of Information Technology (FIT 2019). 16 to 18, Dec, 2019, pp 322-327. Islamabad, Pakistan.
ResilienceP Analysis: Bounding Cache Persistence Reload Overhead for Set-Associative Caches CISTER-TR-190512 
Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar
ABSTRACTPDFPDF Additional Files: PDFPoster
Work in Progress Session, 31st Conference on Real-Time Systems (ECRTS 2019). 9 to 13, Jul, 2019, pp 7-9. Stuttgart, Germany.https://www.ecrts.org/archives/fileadmin/WebsitesArchiv/ecrts2019/wp-content/uploads/2019/06/ECRTS2019-WIP-proceedings.pdf
Trading Between Intra- and Inter-Task Cache Interference to Improve Schedulability CISTER-TR-180803 
Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar26th International Conference on Real-Time Networks and Systems (RTNS 2018). 10 to 12, Oct, 2018, pp 125-136. Poitiers, France.
Integrated Analysis of Cache Related Preemption Delays and Cache Persistence Reload Overheads CISTER-TR-170902 
Syed Aftab Rashid, Geoffrey Nelissen, Sebastian Altmeyer, Robert Davis, Eduardo TovarIEEE Real-Time Systems Symposium 2017 (RTSS 2017). 5 to 8, Dec, 2017, pp 188-198. Paris, France.
Integrating the Calculation of Preemption and Persistence Related Cache Overhead CISTER-TR-161005 
Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar
ABSTRACTPDFPDF Additional Files: PDFPoster
Work in Progress Session, IEEE Real-Time Systems Symposium (RTSS 2016). 29, Nov to 2, Dec, 2016. Porto, Portugal.
Cache-Persistence-Aware Response-Time Analysis for Fixed-Priority Preemptive Systems CISTER-TR-160503 
Syed Aftab Rashid, Geoffrey Nelissen, Damien Hardy, Benny Åkesson, Isabelle Puaut, Eduardo Tovar28th Euromicro Conference on Real-Time Systems (ECRTS 2016). 5 to 8, Jul, 2016. Toulouse, France.Outstanding Paper Award
Cache Persistence Aware Response Time Analysis for Fixed Priority Preemptive Systems CISTER-TR-160207 
Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar
ABSTRACTPDFPDF Additional Files: PDFPoster
Work in Progress Session, 22nd IEEE Real-Time Embedded Technology & Applications Symposium (RTAS 2016). 11 to 13, Apr, 2016. Viena, Austria.
Conference or Workshop Posters/Demos
ResilienceP Analysis: Bounding Cache Persistence Reload Overhead for Set-Associative Caches CISTER-TR-190607 
Syed Aftab RashidPoster presented in 3rd Doctoral Congress in Engineering (DCE 2019). 27 to 28, Jun, 2019. Porto, Portugal.
Towards Timing Analysis of Multi-core Platforms for Hard Real-Time Systems CISTER-TR-180402 
Syed Aftab Rashid, Geoffrey Nelissen, Eduardo TovarPoster presented in Cyber-Physical Systems Week (CPS Week 2018). 10 to 13, Apr, 2018, CPS Student Forum Portugal. Porto, Portugal.