Energy Consumption Awareness for Resource-Constrained Devices: Extension to FPGA
Ref: CISTER-TR-161104 Publication Date: 22, Nov, 2016
Energy Consumption Awareness for Resource-Constrained Devices: Extension to FPGARef: CISTER-TR-161104 Publication Date: 22, Nov, 2016
The devices running embedded applications tend to be battery-powered, and the energy efficiency of their operations is an important enabler for the wide adoption of the Internet-of-Things. Optimization of energy usage depends on modelling power consumption. A model-based simulation must consider parameters that depend on the device used, the operating system, and the distributed application under study. A realistic simulation thus depends on knowledge regarding how and when devices consume energy. This paper presents an approach to direct measurement of energy consumed in the different execution states of the device. We present the architecture and the measurement process that were implemented. We provide a reference architecture, whose constituent parts can be implemented in different manners, e.g. the processing unit of the device can be the chip on a mote, or an Field-Programmable Gate Array (FPGA) implementation. Details are given regarding the setup of the experimental tests, and a discussion of the results hints at which architecture is the best for each application under study. The presented methodology can be extended easily to new architectures and applications, to streamline the process of building realistic models of power consumption.
Published in Journal of Green Engineering (JGE), River Publishers, Volume 6, Issue 3, pp 229-256.