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  • CISTER

    Research Centre in Real-Time and Embedded Computing Systems

    A top-ranked Research Unit based at the School of Engineering (ISEP)
    of the Polytechnic Institute of Porto (IPP), Portugal.

    Find out more...

  • Ongoing Project: DEWI

    Dependable Embedded Wireless Infrastructure
    Find out more...

  • CISTER hosted ARCS 2015

    the Architecture of Computing Systems conference
    in Porto, Portugal from 24 to 27 March.

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Gallery of Hosted Conferencesmore

Latest Newsmore

28, Jul, 2016

Progress in Projects

DSGrid kick-off meeting held

26, Jul, 2016

Progress in Projects

Portuguese Railway Platform initiative - Meeting with Evoleo

On the 13th of July, CISTER researcher David Pereira participated in a meeting organized by Evoleo in the context of the Portuguese Railway Platform initiative. The objective was to bring together all Portuguese railway stakeholders to promote Portugal as an innovative country in the railway industry. The meeting was to finalize project concepts and the corresponding consortiums to prepare for the project submission phases that will soon reach their deadlines. CISTER is a core partner in one of the envisioned proposals that will soon be submitted to an appropriate financing program.
26, Jul, 2016

Activities in the Center

Book on Memory controllers for Mixed-Time-Criticality Systems

CISTER researcher Benny Åkesson has co-authored a book, Memory controllers for Mixed-Time-Criticality Systems - Architectures, Methodologies and Trade-offs. The book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications. The authors describe the state of the art, an architecture template for reconfigurable memory controllers that addresses evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as a prototype implementation in System C and synthesizable VHDL for an FPGA development board.

26, Jul, 2016

Activities in the Center

CISTER participates in Ciência 2016

25, Jul, 2016

Progress in Projects

The EnerGAware project - Serious Games for Energy Efficiency

CISTER researchers Luis Miguel Pinho and António Barros participated in the EnerGAware project meeting held in Barcelona, Spain. The project intends to achieve a 15-30% energy consumption and emissions reduction in a social housing pilot and increase the social tenants’ understanding and engagement in energy efficiency through the development of a serious game that will be linked to the actual energy consumption (smart meter data) of the game user’s home and embedded in social media and networking tools.
The meeting agenda included analysis of feedback from the first review of the project (with very positive remarks from the project officer and project reviewers) as well as status and planning of project activities. In particular, the consortium discussed the deployment of the energy monitoring infrastructure (a work package led by CISTER), which will be used to determine baseline energy consumption and will, in a second phase, observe the effects of the game on energy saving habits of families. Another relevant topic was the FIWARE-based IoT platform, being developed at CISTER, which will analyse and process the monitoring data for real-time connection with the serious game.  
This was a week where CISTER work in EnerGAware was in the spotlight, with also the project being presented in an event organized by GPPQ, the Portuguese office for promotion of the European Framework programs of FCT.
 
More info: www.energware.eu and http://www.gppq.pt/h2020/eventos.php?id=5585
 
25, Jul, 2016

Activities in the Center

CISTER PhD students complete internships abroad

João Loureiro spent six weeks at the University of York, at the Department of Computer Science, in an internship under the supervision of Leandro Indrusiak. The Department is a prestigious institution, with great domain knowledge on Networks-on-Chip (NoC), which is directly related to his topic of interest. The aim of the visit was to acquire knowledge in the domain, especially on the analysis of real-time applications on NoC-like architectures, to be applied on his ongoing PhD research at CISTER.

Shashank Gaur visited the Networked Embedded Software Lab (NESLab), to work with Luca Mottola. NESLab is a research laboratory based at the Politecnico di Milano, Italy, where research combines theories, designs, implementations and deployments of networked embedded sensors and actuators. NESLab is headed by Luca Mottola who is also a senior researcher with SICS Swedish ICT. During the visit, Shashank worked on problems related to complex adaptation policies in programming applications for sensor networks. The visit was helpful in identifying the potential problem, use case scenarios, constructing a generic model and discussion on possible solutions.

25, Jul, 2016

Activities in the Center

Another international researcher joins CISTER

Kai Li joined CISTER in July. He received his B.E. from Shandong University, China, M.Sc. from Hong Kong University of Science and Technology and Ph.D. in Computer Science from University of New South Wales, Sydney, Australia, in 2014. From 2010 to 2011, he was a research assistant in Mobile Technologies Centre with the Chinese University of Hong Kong. In 2012–2013, he worked with the Distributed Sensing Systems Group at CSIRO as a visiting research assistant. His research interests include resource allocation, wireless communication and security, Cyber-Physical Systems, Sensor and Wireless networks. Welcome Kai!

25, Jul, 2016

Activities in the Center

CISTER hosted another distinguished seminar

24, Jul, 2016

Achievements in Academia

RTSS 2016 is around the corner

In the area of real time systems, RTSS is recognized world-wide as the flagship conference, presenting innovations in the field with respect to theory and practice. RTSS provides a forum for the presentation of high-quality, original research covering all aspects of real-time systems theory, design, analysis, implementation, evaluation, and experiences. This year, RTSS will be held in Porto, with Eduardo Tovar, director of CISTER, and Luís Almeida, Professor at the University of Porto, serving as local arrangements chairs. Also, two CISTER researchers, Eduardo Tovar and Vincent Nelis, have been invited to serve as PC members. This year again, the number and quality of the papers submitted and the low acceptance ratio of the conference suggests a very successful top-ranked scientific event.

24, Jul, 2016

Progress in Projects

CISTER participates in European roadmap in High-Performance Embedded Computing

CISTER researcher Luis Miguel Pinho participated in a Brussels meeting related to the preparation of the next edition of the HiPEAC Vision. Published every two years, the document provides a roadmap guiding policy makers and technologists on key issues in the area of computing systems, providing inputs for forthcoming Horizon 2020 calls and setting the challenge of discovering future computing systems and applications.
The document is prepared by the HiPEAC (High Performance and Embedded Architecture and Compilation) Network, a hub for European researchers in computing systems. Already in its 4thincarnation, HiPEAC 4 is a Coordination and Support Action funded by the European Union’s Horizon 2020.
In the meeting, Luis Miguel Pinho presented a position statement on the increasing relevance of time, as a fundamental property of both cyber-physical and big data systems, with new applications that stress the development of real-time applications, with uncertain environments and flexible behaviour.