Hardware/Software Implementation Factors Influencing Ethernet Latency
Ref: CISTER-TR-181115 Publication Date: 18 to 20, Jul, 2018
Hardware/Software Implementation Factors Influencing Ethernet LatencyRef: CISTER-TR-181115 Publication Date: 18 to 20, Jul, 2018
Minimum Cycle Time is a common performance indicator adopted to compare Real-Time Ethernet protocols. Though serving its purpose, Minimum Cycle Time excludes the delays inside the sending and receiving nodes, so it is insufficient to estimate the end-to-end latency. In this work, we describe some implementation possibilities of an Ethernet node in a System-on-Chip and present measurements of the delay to send/receive packets from/to the application layer. We chose different points in the software to make the measurement, so the results cover more use-cases. We found the Ethernet Lite Media Access Controller (MAC) to be faster than the hard MAC (GEM) and the Lightweight IP stack to add less than 2.2 μs. Finally, we show how a hardware accelerator can reduce the delay of high-priority packets by 1.4 μs.
16th IEEE International Conference on Industrial Informatics (INDIN 2018), pp 323-328.