Geoffrey Nelissen (Publications)

PhD Université Libre de Bruxelles
Integrated PhD Researcher

May 2013-February 2020

Geoffrey Nelissen was born in Brussels, Belgium in 1985. He earned his MSc degree in Electrical Engineering at Université Libre de Bruxelles (ULB), Belgium in 2008. Then, he worked during four years as a PhD student in the PARTS research unit of ULB. In 2012, he received his PhD degree under the supervision of Professors Joël Goossens and Dragomir Milojevic, on the topic "Efficient Optimal Multiprocessor Scheduling Algorithms for Real-Time Systems". He is currently working at CISTER as a researcher scientist in the area of multiprocessor real-time scheduling theory. His research interests include real-time scheduling theory, real-time operating systems and multi-processors/multi-cores architectures.

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Conference or Workshop Papers/Talks

Improved Memory Contention Analysis for the 3-Phase Task Model CISTER-TR-240506
Jatin Arora, Syed Aftab Rashid, Geoffrey Nelissen, Cláudio Maia, Eduardo Tovar

ABSTRACT

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Accepted in 30th IEEE International Conference on Embedded and Real-Time Computing Systems and Application (RTCSA) 2024 (RTCSA 2024). 21 to 23, Aug, 2024, Technical Session. Sokcho, South Korea.

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