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Thesis
Timing Analysis of an Embedded Architecture for a Real-Time Power Line Communications Network HURRAY-TR-090301 
António BarrosMaster Thesis. 23, Mar, 2009. Porto, Portugal.
Intermediate-Level Protocols to Provide Quality of Service in Master/Slave Communication Infrastructures HURRAY-TR-090204 
Filipe PachecoPhD Thesis. 16, Feb, 2009. Porto, Portugal.
Conference or Workshop Papers
A Complex Protocol Layer as a linux User-Space Process HURRAY-TR-061006 
António Barros, Filipe Pacheco, Luis Miguel PinhoIEEE Symposium on Industrial Embedded Systems (IES’06), IEEE. 18 to 20, Oct, 2006, Work-In-Progress Session, pp 1-4. Antibes - Juan les Pins, France.
Queuing and Routing in a Hierarchical Powerline Communication System HURRAY-TR-050901 
Filipe Pacheco, Luis Miguel Pinho, Eduardo Tovar10th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA'05), IEEE. 19, Sep, 2005, 2, pp 8-66. Catania, Italy.
A Power Line Communication Stack for Metering, SCADA and Large-scale Domotic Applications HURRAY-TR-050402 
Filipe Pacheco, Marksim Lobashov, Luis Miguel Pinho, Gerhard Pratl9th International Symposium on Power-Line Communications and Its Applications (ISPLC 2005). 6, Apr, 2005, pp 61-65. Vancouver, Canada.
Characterizing the Timing Behaviour of Power-Line Communications by Means of Simulation HURRAY-TR-0429 
Luis Miguel Marques, Filipe Pacheco, Luis Miguel Pinho3rd International Workshop on Real- Time Networks (RTN 2004). 30, Jun, 2004, pp 81-84. Catania, Italy.
Technical Reports
REMPLI Discrete Event Simulation Results HURRAY-TR-070904 
Luis Miguel Marques, Filipe Pacheco23, Sep, 2007.
REMPLI Discrete Event Simulation System HURRAY-TR-070903 
Luis Miguel Marques, Filipe Pacheco20, Sep, 2007.
REMPLI D1.3 - Node Software Specification HURRAY-TR-030302 
Gerhard Pratl, Filipe Pacheco, Peter Maas, Gerd Bumiller, Marksim Lobashov1, Oct, 2003.REMPLI project deliverable.
Order of authors is not relevant in this document. Not all authors are listed.
Reviewer: G. Pratl.