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Benny Åkesson (Publications)

Benny Åkesson (Publications)

Benny Åkesson (Publications)

PhD Eindhoven University of Technology, Netherlands
Collaborator PhD Researcher

Benny Akesson received his MSc degree at Lund Institute of Technology, Sweden in 2005 and a PhD from Eindhoven University of Technology, the Netherlands in 2010. Since then, he has been employed as a Researcher at Eindhoven University of Technology, Czech Technical University in Prague, and CISTER/INESC TEC Research Unit in Porto. He is a Professor by Special Appointment at the University of Amsterdam and holds the Chair of Design Methodologies for Cyber-physical systems since 2019.

Currently, Prof. Akesson is working as a Senior Research Fellow at ESI (TNO) in Eindhoven. His research interest is design methodologies for cyber-physical systems, in particular model-based engineering and real-time systems. He has published more than 60 peer-reviewed conference papers and journal articles, as well as two books about memory controllers for real-time embedded systems.

Benny was in CISTER from August 2012 - January 2013 and returned to the unit in July 2015.

 

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Conference or Workshop Papers/Talks
Critical-Path-First Based Allocation of Real-Time Streaming Applications on 2D Mesh-Type Multi-Cores CISTER-TR-130606 
Hazem Ali, Luis Miguel Pinho, Benny Åkesson
ABSTRACTPDFPDF
19th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2013). 19 to 21, Aug, 2013. Taipei, Taiwan.
Identifying the Sources of Unpredictability in COTS-based Multicore Systems CISTER-TR-130604 
Dakshina Dasari, Benny Åkesson, Vincent Nélis, Muhammad Ali Awan, Stefan M. Petters
ABSTRACTPDFPDF
8th IEEE International Symposium on Industrial Embedded Systems (SIES 2013), IEEE. 19 to 21, Jun, 2013, pp 39-48. Porto, Portugal.
Towards Variation-Aware System-Level Power Estimation of DRAMs: An Empirical Approach CISTER-TR-130402 
Karthik Chandrasekar, Christian Weis, Benny Åkesson, Norbert Wehn, Kees Goossens
ABSTRACTPDFPDF
50th ACM/EDAC/IEEE Design Automation Conference (DAC 2013), ACM New York. 29, May to 7, Jun, 2013, 23. Austin, U.S.A..
Conservative Open-page Policy for Mixed Time-Criticality Memory Controllers CISTER-TR-130104 
Sven Goossens, Benny Åkesson, Kees Goossens
ABSTRACTPDFPDF
Design, Automation & Test in Europe Conference & Exhibition (DATE 2013), IEEE. 18 to 22, Mar, 2013, pp 525-530. Grenoble, France.
Architecture and Optimal Configuration of a Real-Time Multi-Channel Memory Controller CISTER-TR-130107 
Manil Dev Gomony, Benny Åkesson, Kees Goossens
ABSTRACTPDFPDF
Design, Automation & Test in Europe Conference & Exhibition (DATE 2013), EDA Consortium San Jose. 18 to 22, Mar, 2013, pp 1307-1312. Grenoble, France.
System and Circuit Level Power Modeling of Energy-Efficient 3D-Stacked Wide I/O DRAMs CISTER-TR-130106 
Karthik Chandrasekar, Christian Weis, Benny Åkesson, Norbert Wehn, Kees Goossens
ABSTRACTPDFPDF
Design, Automation & Test in Europe Conference & Exhibition (DATE 2013), IEEE. 18 to 22, Mar, 2013, pp 236-241. Grenoble, France.
Bounding SDRAM Interference: Detailed Analysis vs. Latency-Rate Analysis CISTER-TR-130105 
Hardik Shah, Alois Knoll, Benny Åkesson
ABSTRACTPDFPDF
Design, Automation & Test in Europe Conference & Exhibition (DATE 2013), IEEE. 18 to 22, Mar, 2013, pp 308-313. Grenoble, France.
A Declarative Compositional Timing Analysis for Multicores Using the Latency-Rate Abstraction CISTER-TR-130108 
Vitor Rodrigues, Benny Åkesson, Simão Patrício Melo de Sousa, Mário Florido
ABSTRACTPDFPDF
15th International Symposium on Practical Aspects of Declarative Languages (PADL '13), Springer Berlin Heidelberg. 21 to 22, Jan, 2013, 7752, pp 43-59. Rome, Italy.


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