RECOMP
Reduced Certification Costs for Trusted Multi-core Platforms
| Artemis 100202 3 years (Apr 2010 to Mar 2013) http://atcproyectos.ugr.es/recomp/ | |
| Summary: | RECOMP recognizes the fact that the increasing processing power of embedded systems is mainly provided by increasing the number of processing cores. The increased numbers of cores is commonly regarded as a design challenge in the safety-critical area, as there are no established approaches to achieve certification. At the same time there is an increased need for flexibility in the products in the safety-critical market. This need for flexibility puts new requirements on the customization and the upgradability of both the non-safety and safety-critical critical part. The difficulty with this is the large cost in both effort and money of the re-certification of the modified software, which means that companies cannot fully leverage the advantages of modular software system. RECOMP will provide reference designs and platform architectures together with the required design methods and tools for achieving cost-effective certification and re-certification of mixed-criticality, component based, multi-core systems. The aim of RECOMP is to define a European standard reference technology for mixed-criticality multi-core systems supported by the European tool vendors participating in RECOMP. |
| Funding: | Global: 25.8MEUR, CISTER: 456KEUR |
| Sponsors: |    |
| Leaders: |  |
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| Contact Person at CISTER: | Stefan M. Petters |
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Conference or Workshop Papers/Talks
Multicore in Real-Time Systems – Temporal Isolation Challenges due to Shared Resources CISTER-TR-140302
Ondrej Kotaba, Jan Nowotsch, Michael Paulitsch, Stefan M. Petters, Henrik TheilingWorkshop on Industry-Driven Approaches for Cost-effective Certification of Safety-Critical, Mixed-Criticality Systems (WICERT 2013). 22, Mar, 2013. Grenoble, France.
Ondrej Kotaba, Jan Nowotsch, Michael Paulitsch, Stefan M. Petters, Henrik TheilingWorkshop on Industry-Driven Approaches for Cost-effective Certification of Safety-Critical, Mixed-Criticality Systems (WICERT 2013). 22, Mar, 2013. Grenoble, France.
PDFConservative Open-page Policy for Mixed Time-Criticality Memory Controllers CISTER-TR-130104
Sven Goossens, Benny Åkesson, Kees GoossensDesign, Automation & Test in Europe Conference & Exhibition (DATE 2013), IEEE. 18 to 22, Mar, 2013, pp 525-530. Grenoble, France.
Sven Goossens, Benny Åkesson, Kees GoossensDesign, Automation & Test in Europe Conference & Exhibition (DATE 2013), IEEE. 18 to 22, Mar, 2013, pp 525-530. Grenoble, France.
Bounding SDRAM Interference: Detailed Analysis vs. Latency-Rate Analysis CISTER-TR-130105
Hardik Shah, Alois Knoll, Benny ÅkessonDesign, Automation & Test in Europe Conference & Exhibition (DATE 2013), IEEE. 18 to 22, Mar, 2013, pp 308-313. Grenoble, France.
Hardik Shah, Alois Knoll, Benny ÅkessonDesign, Automation & Test in Europe Conference & Exhibition (DATE 2013), IEEE. 18 to 22, Mar, 2013, pp 308-313. Grenoble, France.
System and Circuit Level Power Modeling of Energy-Efficient 3D-Stacked Wide I/O DRAMs CISTER-TR-130106
Karthik Chandrasekar, Christian Weis, Benny Åkesson, Norbert Wehn, Kees GoossensDesign, Automation & Test in Europe Conference & Exhibition (DATE 2013), IEEE. 18 to 22, Mar, 2013, pp 236-241. Grenoble, France.
Karthik Chandrasekar, Christian Weis, Benny Åkesson, Norbert Wehn, Kees GoossensDesign, Automation & Test in Europe Conference & Exhibition (DATE 2013), IEEE. 18 to 22, Mar, 2013, pp 236-241. Grenoble, France.
Architecture and Optimal Configuration of a Real-Time Multi-Channel Memory Controller CISTER-TR-130107
Manil Dev Gomony, Benny Åkesson, Kees GoossensDesign, Automation & Test in Europe Conference & Exhibition (DATE 2013), EDA Consortium San Jose. 18 to 22, Mar, 2013, pp 1307-1312. Grenoble, France.
Manil Dev Gomony, Benny Åkesson, Kees GoossensDesign, Automation & Test in Europe Conference & Exhibition (DATE 2013), EDA Consortium San Jose. 18 to 22, Mar, 2013, pp 1307-1312. Grenoble, France.
A Declarative Compositional Timing Analysis for Multicores Using the Latency-Rate Abstraction CISTER-TR-130108
Vitor Rodrigues, Benny Åkesson, Simão Patrício Melo de Sousa, Mário Florido15th International Symposium on Practical Aspects of Declarative Languages (PADL '13), Springer Berlin Heidelberg. 21 to 22, Jan, 2013, 7752, pp 43-59. Rome, Italy.
Vitor Rodrigues, Benny Åkesson, Simão Patrício Melo de Sousa, Mário Florido15th International Symposium on Practical Aspects of Declarative Languages (PADL '13), Springer Berlin Heidelberg. 21 to 22, Jan, 2013, 7752, pp 43-59. Rome, Italy.
Technical Reports
Energy and Pre-emption Savings through Real-Time Race-To-Halt Algorithms CISTER-TR-130507
Muhammad Ali Awan, Stefan M. Petters30, May, 2013.Technical report
Muhammad Ali Awan, Stefan M. Petters30, May, 2013.Technical report