CISTER Quicknews
21, Nov, 2013
CISTER QuickNews |
Welcome to the November 21, 2013 edition of CISTER QuickNews. CISTER QuickNews is a newsletter providing up-to-date information on the activities and results of the Research Centre in Real-Time and Embedded Computing Systems, being disseminated monthly to a selected audience. For more information, contact us at cister-info@isep.ipp.pt, or visit www.cister.isep.ipp.pt. For the QuickNews archive, visit http://www.cister.isep.ipp.pt/quicknews/. |
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Quick look |
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1. Successful Review of European Project ENCOURAGE 2. P-SOCRATES: FP7 European Project led by CISTER/INESC-TEC Just Started 3. Best Presentation Award at RTNS 2013 4. European Project Proposal To Head For Negotiation Phase 5. CISTER/INESC-TEC Researcher Successfully Defends His PhD 6. New PhD Student at CISTER/INESC-TEC Successful Review of European Project ENCOURAGE CISTER researchers Luis Miguel Pinho and Michele Albano, participated in the 2nd of October in the second year review meeting of the ENCOURAGE project, which took place in the University of Aalborg, Denmark. The meeting was bracketed by internal consortium meetings, for review preparation (Oct 1st) and follow-up activities (Oct 3rd). In the ENCOURAGE project, CISTER is leader of the WP8 Work package (exploitation, dissemination and standardization) and of the T2.3 task, responsible for defining the ENCOURAGE architecture. During this second year, CISTER also had to take the role of responsible for the specification and development of the ENCOURAGE middleware (and in particular of its messaging system), after the funding problems of the initially foreseen partner. More information at: http://www.encourage-project.eu/ P-SOCRATES: FP7 European Project led by CISTER/INESC-TEC Just Started P-SOCRATES (Parallel SOftware framework for time-CRitical mAny-core sysTEmS) is an FP7 funded project aiming to develop new techniques for exploiting the massively parallel computation capabilities of next-generation many-core embedded platforms in a predictable way. These platforms are well positioned for intercepting the increasingly convergence of High-Performance Computing (HPC) and Embedded Computing (EC) domains need for predictable high-performance, allowing HPC and EC applications to be executed on efficient and powerful heterogeneous architectures integrating general-purpose processors with many-core computing fabrics. Best Presentation Award at RTNS 2013 CISTER’s researchers had a significant participation at the 21st International Conference on Real-Time Networks and Systems – held in Sophia Antipolis, France, October 16-18, with cutting edge research being presented in the areas of many-cores and network-on-chip, energy consumption, mixed criticality and multiprocessor scheduling. Notably CISTER received the Best Presentation Award for the paper entitled “Feasibility intervals for homogeneous multicores, asynchronous periodic tasks, and FJP schedulers” authored by Vincent Nelis, Patrick Meumeu Yomsi and Joël Goossens, which was presented by Vincent Nelis. More information at: http://leat.unice.fr/RTNS2013/#page=home European Project Proposal To Head For Negotiation Phase The effort developed by CISTER/INESC-TEC in the last open call for research projects in the strategic ARTEMIS initiative is now giving its results as one of the project proposals is well headed into negotiations regarding its funding and approval. It is expected that the project can start early 2014. The project, EMC2 (Embedded multi-core systems for mixed criticality applications in dynamic and changeable real-time environments) is an Artemis Innovation Pilot Project (AIPP) large project involving many large industrial partners, such as EADS, Thales, Infineon Technologies, Ericsson, BMW, Volvo, Philips Healthcare or Siemens. CISTER/INESC-TEC Researcher Successfully Defends His PhD Paulo Baltarejo Sousa, a long-time CISTER researcher has successfully defended his PhD titled “Real-Time Scheduling on Multi-core: Theory and Practice” on the 29th of October at Faculdade de Engenharia da Universidade do Porto. New PhD Student at CISTER/INESC-TEC CISTER has received a new PhD student that enrolled in the specialized stream in Embedded and Real-Time Systems in the Doctoral Program of the School of Engineering of the University of Porto (FEUP - Faculdade de Engenharia da Universidade do Porto). |
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