CISTER QuickNews - 19 Nov 2014

CISTER Quicknews

19, Nov, 2014



 CISTER QuickNews


Welcome to the November 19, 2014 edition of CISTER QuickNews.

CISTER QuickNews is a newsletter providing up-to-date information on the activities and results of the Research Centre in Real-Time and Embedded Computing Systems, being disseminated monthly to a selected audience.

For more information, contact us at cister-info@isep.ipp.pt, or visit www.cister.isep.ipp.pt. For the QuickNews archive, visit http://www.cister.isep.ipp.pt/quicknews/.

Quick look

1. CISTER participates in H2020 project EnergAware accepted in highly competitive call
2. CISTER researchers chair the 8th Junior Researcher Workshop on Real-Time Computing (JRWRTC)
3. CISTER-lead European project P-SOCRATES meets in Porto
4. Largest European R&D project in the area of wireless sensor networks and wireless communication visits Porto
5. Two talented PhD candidates joined CISTER/INESC-TEC
6. Horizon 2020 Infoday
7. Another PhD from CISTER’s ranks

CISTER participates in H2020 project EnergAware accepted in highly competitive call

In the scope of the European R&D program H2020, in the topic "New ICT-based solutions for energy efficiency“, CISTER participates in the project proposal EnerGAware (Energy Game for Awareness of energy efficiency in social housing communities), which has been recently selected for a grant.

The topic “New ICT-based solutions for energy efficiency“ intends to motivate and support citizen's behavioural change to achieve greater energy efficiency taking advantage of ICT (e.g. personalised data driven applications, gaming and social networking) while ensuring energy savings from this new ICT-enabled solutions are greater than the cost for the provision of the services. This was a highly competitive call, with only 4 projects approved out of 94 submitted proposals.

The EnergAware project intends to achieve a 15-30% energy consumption and emissions reduction in a social housing pilot and increase the social tenants’ understanding and engagement in energy efficiency through the development of a serious game that will be linked to the actual energy consumption (smart meter data) of the game user’s home and embedded in social media and networking tools.

The project is led by the Group of Construction Research and Innovation of the Universitat Politècnica de Catalunya, Spain, including also as partners the game developer Fremen Corp, France, the embedded platform provider Advantic SIS, Spain, the Building Performance Analysis and Sustainability & Psychology groups of the Plymouth University, UK, the Devon and Cornwall social housing provider, UK, and the EDF Energy R&D UK Centre, UK.

CISTER will be involved in several of the activities of the project, being in particular responsible for the design and implementation of both the data collection infrastructure, and the middleware performing real-time data management. CISTER will also lead the work package on the integration of the data collection and communication platform and the EnerGAware game.

Read more here


CISTER researchers chair the 8th Junior Researcher Workshop on Real-Time Computing (JRWRTC)

This year, the junior workshop JRWRTC traditionally organized in conjunction with the 22nd International Conference on Real-Time and Network Systems (RTNS), has been chaired by two researchers of CISTER: Geoffrey Nelissen and Dorin Maxim. The workshop took place in Versailles on the 8th of October and was a success with 13 short papers of 4 pages presented.

The purpose of this 8th Junior Researcher Workshop on Real-Time Computing (JRWRTC) is to bring together junior researchers working on real-time systems (PhD students, postdocs, etc.). It provides a relaxed forum to present and discuss new ideas, new research directions, and to review current trends in this area. The workshop is based on short presentations and a poster session that encourage discussion by the conference attendees.

The award for the best paper of the workshop (a Nexus 7) has been given to Remy Boutonnet and Mihail Asavoae for their paper titled "The WCET Analysis using Counters - A Preliminary Assessment".

Read more here

CISTER-lead European project P-SOCRATES meets in Porto

On September 30th/October 1st, the partners of the European Project P-SOCRATES gathered at CISTER, for two days of intensive technical work. This included in-depth discussions of the scientific and technical work being carried in the project work packages, but important, the specification of the holistic system model and software stack, which will be presented for the 2nd milestone of the project, in the first quarter of 2015. The partners also evaluated the detailed feedback received by the commission on the contents of the first review, which provided very positive remarks on the work being developed, confirming the relevance of the foreseen objectives, as well as stressing the capability and importance of innovation and exploitation.

The P-SOCRATES project is researching and developing new techniques for exploiting the massively parallel computation capabilities of next-generation many-core embedded platforms in a predictable way. These platforms are well positioned for intercepting the increasingly convergence of High-Performance Computing (HPC) and Embedded Computing (EC) domains need for predictable high-performance, allowing HPC and EC applications to be executed on efficient and powerful heterogeneous architectures integrating general-purpose processors with many-core computing fabrics.

The project partners include as research institutions, besides CISTER/INESC-TEC, the Barcelona Supercomputing Centre (Spain), the University of Modena (Italy) and the Swiss Federal Institute of Technology Zurich (Switzerland). The industrial partners of the project include ATOS (Spain) and the SMEs Evidence (Italy) and Active Technologies (Italy). The project partners are supported by an industrial advisory board, which includes well-known multi-national companies including Airbus, IBM, and Honeywell.

Besides overall coordination and technical management, CISTER/INESC-TEC is also deeply involved in the parallelism to real-time activity, leading in particular the Timing and Schedulability analysis work package.

Read more here


Largest European R&D project in the area of wireless sensor networks and wireless communication visits Porto

More than 70 DEWI project partners attended a successful official meeting on 27–29 October 2014, hosted by CISTER in Porto, Portugal.

Besides dedicated work meetings related to the technical work being developed in the project, the members of the main DEWI governance boards (Technical Board, Steering Board, General Assembly) have met to debate DEWI overall status and technical progress, requirements management and other relevant specific topics.

CISTER researchers had a strong contribution for the work in this meeting and in DEWI so far. CISTER is the leader of the application domain on aeronautics, and also leader of the technical board, one of the main governance bodies of DEWI.

Read more here
Follow DEWI on twitter: https://twitter.com/DEWI_PROJECT



Two talented PhD candidates joined CISTER/INESC-TEC

The CISTER/INESC-TEC Research Unit (http://www.cister.isep.ipp.pt/) recently announced two PhD candidate positions in Electrical and Computer Engineering with 3-4 year grants, starting in November 2014.

In response to this call, a total of around 68 applications were received from four continents (Europe, Asia, America and Africa). These applications went through a rigorous three-stage review process and finally two candidates were selected. Research grants will be provided to the selected PhD candidates for up to four years with 12.000,00 € (after taxes) salary per year (the standard value of FCT's PhD grants).

Horizon 2020 Infoday

CISTER Researcher Luis Miguel Pinho represented the research centre in the ICT Proposers’ Day 2014, an event that took place in Florence, Italy on 9th and 10th October 2014 to promote European ICT Research & Innovation, focusing on the Horizon 2020 Work Programme for 2015, in the field of Information & Communication Technologies.

This event offered an exceptional opportunity to build quality partnerships as it connected academia, research institutes, industrial stakeholders, SMEs and government actors from all over Europe. More than 2000 participants discussed the 2015 ICT project calls, including topics in Leadership in Enabling and Industrial Technologies, such as low-power embedded computing, robotics, big data research, and in Societal Changes, such as health and wellbeing, energy efficiency and smart cities.

CISTER is currently involved in several initiatives targeting some of the calls of the 2015 work program, both for Research and Innovation Actions, following the path of current CISTER scientific activities, as well as larger Innovation Actions, where some of CISTER past research results is integrated.

Read more here


Another PhD from CISTER’s ranks


CISTER Researcher Vikram Gupta successfully defended his PhD thesis at the Carnegie Mellon University, Pittsburgh, USA, on Oct 13th 2014, under the Carnegie Mellon-Portugal dual PhD program. The thesis, entitled “On the Optimization of Multiple Applications for Sensor Networks”, was supervised by Prof. Eduardo Tovar (CISTER/INESC-TEC) and Prof. Raj Rajkumar (CMU). The committee was also composed by Prof. Peter Steenkiste (CMU), Prof. Anthony Rowe (CMU) and Prof. José Silva Matos (FEUP).


For Vikram, this was a the pinnacle of a research path developed between Pittsburgh and Porto in the past 6 years, during which a number of seminal results were published in top-venues in the area of real-time embedded systems and wireless sensor networks, including a best paper award at the prestigious ACM SenSys conference.

Read more here


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